1. Field of the Invention
This invention relates generally to electrically and mechanically connecting one electronic component to another electronic component to form an electronic assembly and, in particular, to using a specially defined solder disc connector to simultaneously hermetically seal the electronic assembly while electrically and mechanically connecting the electronic components of the assembly.
2. Description of Related Art
Forming an electronic package assembly whereby an electrical component such as an integrated circuit chip is electrically connected to a substrate such as a card, or board, another chip or any other electronic part is well-known in the art. Surface mount technology (SMT) has gained acceptance as the preferred means of joining electronic devices together, particularly in high end computers. While the invention is directed to forming such electronic package assemblies, the following description for convenience will be directed to joining ceramic electronic components such as multilayer ceramic components as exemplified by integrated circuit chips.
Multilayer ceramic electronic components are typically joined together by soldering pads on a surface of one of the electronic components to corresponding pads on the surface of the other component. Control Collapse Chip Connection is an interconnect technology developed by IBM as an alternative to wire bonding. This technology is generally known as C4 technology or flip chip packaging. Broadly stated, one or more integrated circuit chips are mounted above a single or multilayer ceramic substrate and pads on the chip are electrically and mechanically connected to corresponding pads on the substrate by a plurality of electrical connections such as solder bumps. The integrated circuit chips may be assembled in an array such as a 10.times.10 array on the multilayer ceramic surface.
In the C4 interconnect technology, a relatively small solder bump is attached to the pads on one of the components being joined. The electrical and mechanical interconnects are then formed by positioning the other electronic component adjacent the solder bumps and reflowing the bumps at an elevated temperature. The C4 joining process is self-aligning in that the wetting action of the solder will align the chip bump pattern to the corresponding substrate pads.
In the finished flip chip package, there is an opening or space between the pad containing surface of the integrated circuit chip and the pad containing surface of the joined substrate resulting from the thickness of the solder bump connection between the pads. This open space cannot be tolerated because any interference with the solder connections will adversely affect the performance of the package. For example, moisture, infusion of thermal paste used to increase heat transfer from the chip and mechanical integrity of the chip possibly breaking the electrical connections are all serious problems. To solve the problems, the joined integrated circuit chips are often encapsulated in a suitable plastic package to protect the integrated circuit chips and assembly mechanically, electrically and chemically.
In the C4 technology, the chip opening is encapsulated totally or, in many cases, a sealant is used around the chip edges to seal the opening. Presently, non-reworkable sealants which are thermoset highly cross-linked materials are used. Encapsulation of the packages, however, presents many problems. The package must be reliable and thermal mismatches between the encapsulant and the chip, substrate or solder bumps must be minimized to avoid stressing and damaging of the package. The encapsulant must be able to withstand the solder joining process temperatures. Further, the C4 encapsulated chip should also be reworkable to facilitate its usefulness.
A myriad of solder structures have been proposed for the surface mounting of one electronic structure to another. Typical surface mount processes form the solder structures by screening solder paste on conductive, generally metallic pads exposed on the surface of the first electronic structure or substrate. A stencil printing operation is used to align the contact mask to the pads. The solder paste areas on the screen substrate are then aligned to corresponding pads on the electronic structure or board to be connected. After alignment, the substrate and board go through a reflow operation to melt the solder paste and create a solder bond between the corresponding pads on the substrate and other electronic components.
Other known surface mount technology uses solder balls rather than solder paste to provide the solder connecting structures. By using solder balls, a more exact and somewhat greater quantity of solder can be applied than from screening. The solder balls are aligned and are held to a substrate and melted to form a solder joint on a conductive pad of the substrate. As before, the substrate with the newly joined solder balls is aligned to the board to be connected therewith and the solder balls are then reflowed to perform a solder bond between the two substrates.
In IBM Technical Disclosure Bulletin, Vol. 29, No. 4, September, 1986, the use of a copper ball surrounded by eutectic solder is shown as the joint structure for attaching a multilayer ceramic (MLC) substrate to a PC laminate wherein the ball serves as a standoff. A similar concept is described by Totta and Sopher for SLT technology as described in "SLT Device Metallurgy And Its Monolithic Extensions" IBM JRD, Vol. 13, No. 3, pps. 226-238, May, 1969. Both techniques employ soldering together of two distinct components. Japanese Pat. No. 7,099,385 describes the manufacturing process of preventing crushing of an entire solder ball due to melting of solder and provides a simple connection structure in the gap between connection terminal by using a metallic sphere precoated with solder. The basic SBC structure and processes are described in U.S. Pat. Nos. 5,060,844 and 5,118,027 which patents are hereby incorporated by reference. Also, in IBM Technical Disclosure Bulletin, Vol. 26, No. 9, February, 1984, a dimensionally controlled semiconductor package is shown whereby a lead-tin alloy preform is fabricated to facilitate hermetic sealing of a protective cap to a chip containing substrate. In the four corners of the preform are located copper disks whereby when the assembly is heated, the preform including the copper disks are attached to the substrate. The resulting attached preform is then subjected to a flattening operation and the cap placed in position. The assembly is then reflowed in an inert atmosphere to join the cap to the substrate.
Bearing in mind the problems and deficiencies of the prior art, it is therefore an object of the present invention to provide a solder connector which may be used to join electronic components.
It is a further object of the present invention to provide a solder connector which may be used to join multilayer ceramic components together and, more particularly, to simultaneously join the electronic components while providing a hermetic seal for the combined components and resulting assembly.
It is another object of the present invention to provide a method for making an electronic assembly by using a specially designed solder connector to join the electronic components making up the assembly.
It is an additional object of the present invention to provide a method for simultaneously joining two electronic components while simultaneously hermetically sealing the formed electronic assembly.
It is yet another object of the present invention to provide an electronic component assembly made using the method of the invention and the solder connector of the invention.
Other objects and advantages of the present invention will be readily apparent from the following description.